Senior Verification Engineer - MEMS / UVM / SystemVerilog
We are currently partnered with a global leader in advanced MEMS-based programmable semiconductor solutions transforming the timing industry. They are looking to expand their team with an experienced verification engineer to work on the development of MEMS timing ICs.
This is a permanent position based in Delft, The Netherlands. (Visa Sponsorship available)
Key Responsibilities:
Key Requirements:
Keywords: SystemVerilog / UVM / AMS Verification / SV Assertions / MEMS / Mixed-Signal / Digital Design / RNM / Python / Perl / Cadence Virtuoso / Semiconductor / FPV / Datapath Verification / C++ / ASIC / RTL
If you are interested in this Senior Verification Engineer position, please send a copy of your CV to ts@eu-recruit.com
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Senior Verification Engineer - MEMS / UVM / SystemVerilog • Delft, South Holland, Netherlands
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